Rethinking Deep Learning Processing

Hailo’s revolutionary architecture is a clean-slate approach to the design of a specialized technology stack. It has created a domain-specific processor that vastly outperforms the Von Neumann architecture for deep learning tasks.

Hailo’s Structure-Defined Dataflow Architecture

Hailo delivers multiple innovations, addressing the fundamental properties of neural networks:

ハードウェアとソフトウェアの組み合わせに基づいた革新的な制御スキームは、非常に低いjoules(エネルギー)/operationを実現し、高い柔軟性を実現します
Neural Network Graph

Resource

processing

breakdown

Resource Graph

Physical

resource

mapping

Hailo Processor
Architecture Drawing Static 2020-01

The Hailo Dataflow compiler receives the user model as an input. The image is merely an illustration, the toolchain is not bounded to specific network architecture or network depth.

As part of the build flow, the Hailo Dataflow compiler is breaking down each of the network layers to the required computational elements, generating a resource graph which is representing the target network.

The Hailo Dataflow compiler is matching the target network’s resource graph to the physical resources on the device, generating a customized data pipe for the target network.

Discover new computing capabilities to empower your AI technologies